1. Field of the Invention
The present invention relates to an information processing system using an interrupt control method and, more particularly, to an asynchronous interrupt inhibit apparatus suitable for program processing of an inseparable operation requiring interrupt (asynchronous interrupt) inhibit.
2. Description of the Related Art
In an information processing system using an interrupt control method, as one of points to which much attention is paid when a program is to be executed, there is an asynchronous interrupt such as a timer interrupt and an input/output interrupt asynchronously generated with program execution in a period of an inseparable operation.
An inseparable operation is an operation in which a plurality of commands are (consistently) sequentially performed without interruption.
An interrupt (operation error interrupt, incorrect memory reference interrupt, or the like) generated synchronously with execution of a program can be prevented from being generated as follows. That is, programing is performed such that a factor of the generation is determined in advance. However, when an asynchronous interrupt is performed during an inseparable operation, the following problems are posed.
The problems related to an inseparable operation will be described below with reference to FIG. 1. FIG. 1 shows a case wherein an interrupt is generated in a program X for setting logical AND of the contents of the memories (M1 and M2) into a register R3.
An operation performed by the program X is divided into the following three steps.
(1) The content of a memory M1 is read into a register R1.
(2) The content of a memory M2 is read into a register R2.
(3) The logical AND of the contents of the registers R1 and R2 is obtained, and the resultant value is set into the register R3.
In the program X, the following is assumed. Immediately after step (1), the interrupt shown in FIG. 1 is generated, and the contents of the memory M1 and M2 are changed during this interrupt processing.
In this case, the content of the memory M2 after the interrupt processing is ended is different from the content of the M2 in the state of step (1). Therefore, if steps (2) and (3) are performed, an inconvenient result is obtained by the interrupt processing. For this reason, the operation of steps (1) and (2) must be (consistently) sequentially performed without interruption.
When an asynchronous interrupt is generated during an inseparable operation, the above problems are posed. Therefore, an inseparable operation must be prevented from experiencing an asynchronous interrupt.
As methods of securing an inseparable operation, the following three methods are known.
The first method is a method of supporting all the inseparable operations with an instruction word. This method has the following drawbacks. That is, a hardware design amount including firmware is enormous, and a low processing speed results from the performance of the method.
The second method is a method of supporting an inseparable operation by a system call. This method has the following drawbacks. The method cannot be used in an OS (operating system), and a low processing speed results from the performance of the method.
According to the third method, an inseparable operation is ensured such that interrupt inhibit during an inseparable operating period and interrupt release (interrupt enable) are supported by an instruction word. Since the third method does not have the drawbacks of the first and second methods, the third method is relatively generally used. However, the third method has the following drawbacks. In a program in a user mode, when the program is ended in an interrupt inhibit state, an interrupt cannot be enabled to stop the system. Normally, although the inseparable operations are ended at the end of the program, the program may overrun by breaking a program pointer or the like. In this case, the program is ended without interrupt enabled, and system stop occurs.
As described above, in a conventional technique, a method for supporting interrupt inhibit during an inseparable operating period and interrupt release (interrupt enable) by an instruction word is generally used. However, the conventional method has the problem that when a program is broken by interrupt control performed by interrupt enable/inhibit instructions, the system is stopped in an interrupt inhibit state thus causing an adverse influence on the system.